Q&A Interview with Scott West – Expanding SSD Test Capabilities for Extreme Temperatures

Advantest has found great success with its test solutions aimed at the solid-state drive (SSD) market. In this issue of GO SEMI & Beyond, Scott West, Product Marketing Manager for System-Level Test, provides some background on how the company began to address this market, and shares details on its latest SSD offering, the MPT3000ARC, for validation testing to accommodate extreme thermal standards. 

Q: What was the catalyst for developing this latest addition to the MPT3000 family?

A: Let me briefly recap the MPT3000’s evolution. After spending several years on product research and development, we launched the SSD platform in 2014, signaling a branching out for Advantest from chip test to system-level test. While chips are a single unit, manufactured all at once, with everything controlled by the chipmaker, SSD drives are themselves systems. They’re modules that contain a great deal of flash memory, a controller, controller circuitry, protection capacitors, and other components, which adds further complexities from a test standpoint.

Our focus from the start has been to test SSDs through a protocol interface, including the three primary SSD protocols: SATA [Serial ATA], SAS [Serial Attached SCSI] and PCIe [PCI Express]. All products in the platform test all of these protocols, including PCIe Gen 4, the latest version of PCIe, which is about twice the speed of Gen 3. However, with the ARC system (see Figure 1), we’re expanding in a different direction – we’re looking not just at all SSD protocols, but at all test insertions.

Q: How does this differ from the other MPT3000 products?

A: Each product in the platform has a slightly different, and specific, purpose. The MPT3000EV2 (the second generation of the 3000ENV) is a large-chamber system for reliability demonstration testing (RDT), which is focused on the test design. This involves constant hot and cold temperature cycling of several hundred drives over many months. For example, there is one project we are working on that requires more than six months of constant temperature cycling and testing.

The MPT3000HVM is a rack system designed for production test. It tests each individual drive during high-volume manufacturing to make sure it’s good. It requires not months but several hours, under hot conditions only, with a large amount of power pushed through, to validate that each drive works as expected. It can test quickly because of the rack design – you can put in one drive and immediately begin testing while you’re loading more.

The ARC system addresses a couple of key parameters that the other systems in the family don’t with respect test insertions. The first is extreme temperature range. The standard is referred to as automotive range (-40°C to +105°C), which is where the product name is derived from – ARC stands for Automotive Range Chamber. But automotive is only one application; the standard is also used in aerospace, defense and other ruggedized applications that require extreme temperature range.

The second parameter is high-volume production cold-temperature test. The new chamber was designed to be able to accommodate this type of testing in the production environment, for which the EV2 is not as well suited as it is optimized for very test times. In the enterprise, cold temperature – down to as low as -40°C – is often required for production test. The MPT3000ARC can test up to 128 PCIe Gen 4 DUTs in parallel. Because you have to load the entire chamber at once at ambient temperature, it doesn’t make sense to make it too big, as the ergonomic range needs to be production friendly.

Q: Do all the MPT3000 products have the same pin electronics?

A: Yes, all the systems are compatible with respect to the software and firmware, and all electronics that go to the DUT come from the same test electronics boards. The systems feature up to 22.5G electronics with tester-per-DUT architecture.

However, the ARC system interface boards, which are designed for the system’s thermal interface, are different from those for the HVM. In the ARC chamber, the chamber is turned on its side, with up to four primitives inserted vertically instead of horizontally (see Figures 2 and 3). This creates a totally closed system that allows air to circulate from right to left inside the chamber, whereas the HVM rack-based system pulls air from the room and then blows it to the back of the system and out into the room. The ARC chamber also features a pocket door designed to accommodate the ergonomic requirements of manual loading and to be automation friendly as well

Q: What are some other key features of the MPT3000ARC?

A: As I mentioned earlier, the system has the ability to test up to 128 DUTs of 50W each. The primary compressor stage has a water-cooled condenser that transfers the energy generated by the chamber load to the test floor’s water-cooling system. This construction helps regulate chamber temperature to ensure consistency. The system has two programmable power supplies for PCIe DUT, targeting high-power enterprise SSDs, and performs current and voltage measurement with high accuracy.

We introduced the MPT3000ARC at the Flash Memory Summit in August 2019, where it was very well received, and the system has shipped to the first customer. We look forward to sharing further successes and advancements in the future.

FIGURES

Figure 1. The MPT2000ARC is the latest addition to the MPT3000 family of SSD testers, and tests devices to extreme temperatures.

Figure 2. The chamber for the MPT3000ARC is oriented vertically to allow a fully closed system with right-to-left air flow. The primitives are stacked 2×2, back to front. 

Figure 3. This view inside the ARC chamber shows the positioning of one of the lower primitives in a 64-DUT system.

 

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Q&A Interview with Dieter Ohnesorge – 5G mmWave Challenges and Solutions

By GO SEMI & Beyond staff

mmWave is the key topic when it comes to frequency ranges that allow to allocate more bandwidth. millimeter-wave (mmWave) is the band of spectrum between 24 GHz and 100 GHz. As it enables allocation of more bandwidth for high-speed wireless communications, mmWave is increasingly viewed as one key to making 5G connectivity a reality. In this issue, Dieter Ohnesorge, product manager, RF solutions for Advantest, discusses the market opportunity and test challenges associated with 5G mmWave, as well as Advantest’s solution for addressing them.

Q. We’ve been hearing about the promise of 5G for a long time. What demand drivers are edging it closer to fruition?

A. If you look at the global ecosystem [Figure 1], there is massive potential for 5G in many vertical markets. For example, 5G will be an essential aspect of smart manufacturing (SM). SM processes provide greater access to real-time data across entire supply chains, allowing manufacturers and suppliers to manage both physical and human resources more efficiently. This will result in less waste and system downtime and will make more technology-based manufacturing jobs available.

Remote access to health services is another key benefit of 5G. First, it would mean less driving, which is much better for the environment as well patients and doctors and staff. Second, if you’ve already had a screening and the doctor has access to it, why not communicate remotely, saving time on both sides? With 5G, you have the benefit of high bandwidth and low latency, which is important for many applications. Autonomous driving, consumer multimedia applications, and remote banking are just a few more of the many areas that will benefit from highly reliable connections, as well as high bandwidth and/or low latency.

Figure 1. A global ecosystem of vertical deployments stand ready to benefit from 5G.

Q. What has prevented 5G from becoming fully implemented?

A. Primarily, the infrastructure requirements. A specification of this scale cannot be implemented on a local basis alone – it takes a concerted, global effort. The worldwide effort to achieve 5G standardization is a huge step forward. In the U.S., discussions about mmWave technology are currently under way, and at the end of the year or early next year, the discussion will expand towards 5G in the <6GHz band.

In 2015, Verizon took it upon themselves to define a proprietary version of 5G as the next step forward from the current 4G LTE standard. At the end of 2018, the 5G NR (New Radio) industry standard developed from the Verizon effort was released, and all new deployments will follow this spec. In the U.S., initially the frequency band is 28 GHz, with carrier bandwidth of two 425-MHz channels and 24 GHz with seven 100 MHz channels. Additional frequency bands will be auctioned by the FCC for 37, 39 and 47 GHz from December 2019 onward. Other mmWave activities can be seen all over the world, although at different pace.

Q. Where does mmWave come into play?

A. Because the portion of the spectrum that mmWave covers is largely unused, mmWave technology can greatly increase the amount of bandwidth available, making it easier to implement 5G networks. Lower frequencies are currently taken up with the current 4G LTE networks, which typically occupy between 800 and 3,000 MHz. Another advantage is that mmWave can transfer data faster due to the wider bandwidth per channel, although over a shorter transfer distance – up to around 250 meters, or just over 800 feet. This means that it could conceivably work as a replacement for fiber or copper wire into homes and businesses, and this “last mile” capability would broaden the reach of 5G to cover both small and very large areas.

Q. What are the challenges around mmWave test that spurred Advantest to develop a solution? Which does it address?

A. Advantest’s Wave Scale RF card for the V93000 tester platform has seen great success. Its operational range is 10 Mhz to 6 GHz, so we needed a solution that can address the frequency and power requirements associated with higher-bandwidth devices.

Frequency is one of the key parameters associated with mmWave, and with that comes power-level measurement, EVM [error vector magnitude], ACLR [adjacent-channel leakage ratio], and other aspects that all need to be addressed in the testing process to ensure they meet specifications at the wider bandwidths required by 5G-NR.

Another requirement is the number of ports – with 5G mmWave’s beamforming capability, testing could easily be in the range of as many as 32 to 64 ports. At the same time, due to the frequency nature of mmWave, with 5x to 7x frequency, the cost goes up as well. That’s also been one of the challenges: holding down the cost of test with a wide number of sites being tested in parallel.

The V93000 Wave Scale Millimeter test solution, which we introduced in May 2019, extends the capabilities of Wave Scale RF. It is designed for multi-band mmWave frequencies, offering high multi-site parallelism and versatility. It has two operational ranges: 24 GHz to 44 GHz for 5G mmWave, and 57 GHz to 70 GHz, which extends the product’s capabilities for the wireless Gigabit, or WiGig, era. Figure 2 shows the range of frequencies that Wave Scale was developed to cover.

Figure 2. Wave Scale RF provides a scalable platform for connectivity device test, from standard RF to millimeter-wave.

In addition, new modules can be added as new frequency bands are rolled out worldwide. The card cage has up to eight mmWave instruments, making it versatile, cost-effective, and able to perform as well as high-end bench instruments. Because it has wideband testing functionality, Wave Scale can handle full-rate modulation and de-modulation for ultra-wideband (UWB), 5G-NR mmWave up to 1 GHz, and WiGig up to 2 GHz, supporting probes as well as antenna-in-package (AiP) devices connectorized, and over-the-air testing.

Figure 3 illustrates 5G device measurements that can be achieved using Wave Scale Millimeter: power out/flatness test results. The solution’s massive parallelism allows these tests to be performed quickly and at significant cost savings.

Figure 3. This graph overlays a customer’s 8-channel transceiver power-out test results, performed over 800 MHz at 28 GHz. Wave Scale allows channel flatness to be executed in a single operating sequence, one channel after the other.

Q. When will this solution be widely needed?

A. The Industry is still learning how to test these devices. We can help customers get started now, thanks to the modularity of the solution. They can start below 6GHz and when they need the higher frequency, we can add the mmWave capability.

The bottom line is that Advantest’s platform approach is ideal for this scenario – because it is scalable and modular, we can continue to add to the product’s functionality to make it even more comprehensive. By being ahead of curve, we will have the right solution ready when our customers need to adapt to new requirements.

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Q&A Interview with Keith Schaub

By GO SEMI & Beyond staff

The use of artificial intelligence (AI) techniques such as machine learning is growing as the semiconductor industry discovers new ways to use these approaches to do things that humans cannot. In this issue, we talk with Keith Schaub, Vice President of Business Development for Advantest America’s Applied Research Technology and Ventures, about unique research Advantest is conducting with the Univ. of Texas, Dallas, to integrate machine learning into a challenging area of chip development: RF transceiver design, test and manufacturing.

Q. What led Advantest to begin investigating the use of machine learning for this application?

A. Machine learning has been around for a long time. It’s actually a subset of AI, by which machines learn how to complete tasks without being explicitly programmed to do so. There have been many startups over the years that looked to leverage machine learning, but it’s never really been implemented previously within the semiconductor industry. As we have begun to do more work looking at the potential advantages of using AI, we’ve come to realize there are some practical applications by which the industry could greatly benefit.

Q. What is the approach you’re developing for implementing machine learning?

A. The approach we’ve been working on with UT Dallas is a proof of concept for how to take a machine learning method and apply it to semiconductor manufacturing and test – specifically, RF transceivers. Machine learning is much better suited to analog than to digital devices. Digital is a series of 1s and 0s, so the system can either recognize something or not, but there’s no ability to drill down in terms of granularity in order to leverage the more powerful aspects of machine learning. Analog systems require far more data because they’re more complex, making them a better environment for machine learning.

In RF applications, the numerous transmission protocols, large amounts of data, and large bandwidths with high data rates create challenges that call for the development of new algorithms for which modern machine learning is well suited. RF transceivers are affected by a variety of impairments, such as compression, interference and offset errors, as well as IQ imbalance. IQ signals form the basis of complex RF signal modulation and demodulation, both in hardware and in software, as well as in complex signal analysis.

Figure 1 shows a typical RF transceiver circuit, with a number of potential noise errors highlighted in red. A graphical representation of the signal quality can be generated to correspond with each error (Figure 2). The challenge for the operator is knowing which error generated which plot, and which errors are the most problematic.

The approach we’ve developed is a machine learning-based solution for noise classification and decomposition in RF transceivers. The machine learning system can be trained to learn and then identify and match up each impairment to each noise plot; this is something that would be virtually impossible for a human to do.

Figure 1. RF circuit with potential noise errors in red.

Figure 2. Constellation plot showing signal quality impairments caused by various noise errors.

Q. How would this be put to use in a manufacturing environment? 

A.  Figure 3 illustrates how the machine learning solution works. During the training process – this is literally how the system learns to recognize and classify data – a set of constellation points from early versions of the ICs being developed are fed into a machine learning system. Extracted features are separated by category as either noise-type classification or noise-level regression, with the system learning what each type is and how to separate and recognize them by individual error. This is indicated by the different colors assigned to each specific noise type. This is particularly valuable because, while RF transceiver designs, like those of most analog circuits, involve a high degree of customization, certain types of noise errors can potentially occur regardless of the specific circuit.

Once the training process is complete, the system can be put into use in production mode with actual DUTs [devices under test], and use what it has learned through the training process to apply models, identify the various types of errors and provide an impairment report. The system doesn’t have to go through lengthy downtime because the assessment can be completed quickly, and the resulting report allows the user to determine which errors are most critical and need to be addressed so that no damage or yield loss occurs.

Figure 3. Machine learning process for RF transceiver noise classification and decomposition.

This approach can be used throughout the test process – not only for device and system-level test, but also during design-for-test, so that analog/RF designers can better simulate and understand whether their designs will work. This is important due to amount of hand/custom work and the number of variables associated with analog device design.

Q. At what point do you see this technique being broadly adopted in the industry? What challenges would prevent this from occurring?

A. While the technology is mature enough that it could be implemented right away, there are several reasons machine learning has not yet been broadly adopted in the semiconductor industry. For one, there haven’t been sufficient resources/datasets to support its widespread use. For another, the industry is highly risk averse and concerned about security, so companies don’t want to make their data – which is their valuable IP – available for the machine learning process. They have it in the cloud, but in their own individual clouds, which don’t talk to each other. My belief is that use of machine learning will become widespread when the big IDMs [integrated device manufacturers] take the initiative, and the rest of the industry will follow suit.

NOTE:

Advantest’s Applied Research Technology and Ventures group would like to acknowledge the recent publication at the 2019 IEEE 37^th VLSI Test Symposium (VTS) of a paper titled “Machine Learning-based Noise Classification and Decomposition in RF Transceivers,” which details the work described in this interview. The paper was jointly developed by Deepika Neethirajan, Constantinos Xanthopoulos, Kiruba Subramani, Yiorgos Makris (UT Dallas), Keith Schaub and Ira Leventhal (Advantest America).

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Q&A with Advantest President & CEO, Yoshiaki Yoshida discusses the mid-term plan, Grand Design

By GO SEMI &  Beyond staff

The subject of this issue’s Q&A is Yoshiaki Yoshida, president and CEO of Advantest Corporation. He joined Advantest in 1999 and held a succession of leadership positions prior to being elected to his current roles in January 2017. He holds a degree in management from Yokohama National University. Mr. Yoshida recently introduced new business strategies that will guide Advantest’s business both in the near term and over the next decade.

Q. What were the trends that helped Advantest achieve the strong financial results for FY2017?

A. Advantest’s FY2017 financial year-over- year growth of 32.9% can be linked to several key industry trends. Strong demand for 3D NAND flash memory and DRAM led memory chipmakers to actively invest in expanding their production capacity. In addition, high-performance computing (HPC), artificial intelligence (AI), display driver ICs, and automotive ICs and sensors amid advancements in automotive electronics – combined with demand for data center-related semiconductors – were major contributors.

Q. Advantest has developed a “Grand Design” plan. What market / industry advances led to the development of this plan?

A. Amidst the digital transformation driven by semiconductor evolution, Advantest’s business environment is changing dramatically. With the explosion of data driving developments in semiconductor technology, the tester market is evolving in concert with the semiconductor space. Whereas chip drivers previously evolved from mainframes to PCs and smartphones, semiconductors are now becoming the infrastructure of a data-centric future, as complex applications including data centers, 5G communications, and human/machine interfaces move into the spotlight. [See Figure 1.] These applications require more complex semiconductors with greater capacity and functionality – and, in turn, test systems that can accommodate their advanced testing requirements.

 

To capitalize on these successes and take full advantage of the industry environment, we developed the 10-year Grand Design, as well as the Mid-Term Plan, which covers FY2018 through FY2020.

Q. What are the key aspects of each of these plans?

A. The vision of Advantest’s Grand Design is to add customer value in an evolving semiconductor value chain. More specifically, we will further contribute to the semiconductor industry by enriching, expanding and integrating our test and measurement solutions throughout the entire value chain. [See Figure 2.] Our business is organized into three reportable segments: (1) semiconductor and component test systems; (2) mechatronics; and (3) services, support and other activities to address the wide-ranging needs of customers in every area of the industry ecosystem.

Q. Why is Advantest uniquely positioned to successfully implement these business plans?

A. We have a number of advantages working in our favor.

1. We have the world’s leading product portfolio, built on highly scalable, modular platforms, and we hold a dominant position in several key growth areas, including DRAM, non-volatile memory (NVM), HPC and networks.
2.  We have the number one global customer base, developed and nurtured over many years, with a very strong presence in fast-growing Asia markets.
3.  We offer complete test environments, including chip-handling tools and device-interface peripherals, and we have strong, comprehensive support teams in every region we serve. We are excited by the opportunities afforded by the current state of the industry, together with our already strong and well-established position in the global semiconductor ecosystem. We look forward to making great inroads with our near- and long-term plans, and to reporting on key successes and innovations that will enable us to achieve our objectives, strengthen our portfolio, and become the number one provider of test and measurement solutions.

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Q&A Interview

Doug Lefever, Director, President and CEO of Advantest America, and Managing Executive Officer, Board of Directors, Advantest Corporation

By GO SEMI & Beyond staff

This article was adapted from an interview that originally appeared in the Silicon Catalyst newsletter.

Q: Where does Advantest fit into the semiconductor ecosystem?

A: As the semiconductor industry has evolved and grown, so has Advantest. We are active throughout the ecosystem, as the figure shows, providing solutions from silicon-level testing up to system-level testing – an area we see having a great deal of potential for growth. Today, our industry-wide involvement reaches beyond our core capabilities in test and measurement to encompass lithography, data logging, consulting and other areas. Oftentimes, folks at startups have done engineering development, but have not been involved in broader business operations, so Advantest can help to bring them along the learning curve. This allows us to form alliances with early-stage companies, which typically don’t need a deep dive into test technology or to get a device onto a tester.

Q: Why does Advantest partner with an incubator like Silicon Catalyst?

A: Because Silicon Catalyst is focused solely on semiconductor solution startups, it provides very early-stage companies with access to goods, services and experience from its network of in-kind partners – all of which are businesses that have been through the startup process. At Advantest, we’re excited to be able to support new startups through our involvement with the incubator. Our commitment comprises 160 hours per month technical education, management guidance, sharing insights and mentoring – the equivalent of one month’s work by a full-time, experienced industry member.

I want to stress that, as these are very, very early-stage ventures, none has yet implemented our actual test resources on its nascent IC designs. We are mentoring and advising them on developing test strategies and manufacturing flows – and, on a broader scale, we are sharing our hard-won experience in running a company. Our business proficiency allows us to perceive where young ventures have weaknesses and help them to address those weaknesses.

These young companies have promising technologies or application ideas, but generally need to gain “ground floor,” startup-level experience. Silicon Catalyst provides opportunities for them to begin building out their teams and to make real connections with equipment and technology providers or financial people, depending upon their stage of development. A key reason that we decided to join the ecosystem is so that we can help figure out ways to reduce the cost of developing and financing new semiconductor startups; funding new technology or anything semiconductor-related has proven challenging to the industry.

We recognize that we’re not going to be selling test systems right away. But a few years down the road, as some portfolio companies that have had access to our technology and our support services become successful, they may gravitate toward our platforms. Advantest does not fund any of these companies or sit on their boards, but we are the only ATE company that gets to help evaluate new companies and new technologies when they ask to join Silicon Catalyst. We can also talk to companies with technologies or IP of interest to us, regardless of whether or not they are added to the portfolio.

Gaining exposure to what’s coming gives us insight into where our industry is headed, what type of equipment customers will need and, perhaps, even the types of performance we might expect from future electronic products. We are gleaning information about emerging technology trends, as well, in such areas as optical, materials, power management, memory cells, MRAM, and low-power memory technology – to name a few.

Q: Where are you seeing momentum in semiconductor startups?

A: As I mentioned, optical is a key trend – many optical-related companies are leading the next wave of high-bandwidth connectivity and low-power computing. While some are building a single chip and others are developing whole modules, the volume of optical products is starting to grow, and high-volume manufacturing (HVM) will be the next step.

In terms of applications, consumer optical-based communications are on the rise. In this area, a new standard is emerging called NGPON-2, which is next-generation Ethernet over passive optical connections. Another area of focus of a number of startups is high-bandwidth computing, while massively parallel computing is enabling advances in artificial intelligence (AI), machine learning and Big Data with shared databases. Dedicated chips are being built for machine learning.

Wearable technology for medical and health-related applications is increasingly incorporating such capabilities as blood monitoring and analysis. One company is making a device that will be able to perform a diagnostic screening on a blood sample at point-of-care without requiring an extensive blood panel analysis. The AI system will be taught patterns consistent with specific pathogens, bacteria or other components so that, when the blood sample is put into the device, the system can determine, within 10 minutes, what’s in there – a much faster and cheaper solution than what’s available today.

Other interesting areas addressing power requirements include low-power memory and energy harvesting, which is wearable technology that uses the heat of your body to charge a battery. The bigger the temperature difference between your body and ambient air, the more energy it puts out.

These are just a few of the technology areas where we are seeing burgeoning opportunities for startups, as well as the industry at large, in the semiconductor arena.

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